Modern semiconductor based integrated circuits (ICs) are incredibly complex and contain millions of circuit devices, such as transistors, and millions of interconnections between the circuit devices. Designing such complex circuits cannot be accomplished manually, and circuit designers use computer based Electronic Design Automation (EDA) tools for schematics, layouts, simulation, and verification of the complex circuits. Furthermore, EDA tools allow circuit designers to optimize a complex electronic circuit, for example, by reducing the footprints of the various circuit devices. The current version of Moore's law states that the number of transistors per square inch in an IC doubles every eighteen months. Reducing the footprint of transistors and other circuit devices, for example, by keeping them closer together will keep the pace of the explosive and exponential growth of computing power, as foreseen by Moore's law.
An EDA tool may optimize an IC design by forming a chain of abutted layout devices to reduce the device footprint of the layout devices. In other words, the EDA tool may pack the layout devices closer together or merge the layout devices (by abutting) thereby saving valuable semiconductor space in the IC. For example, the EDA tool may detect that two layout devices are sufficiently close to be abutted and may trigger an abutment process based on such detection. The EDA tool may then form chain of abutted layout devices, wherein successive layout devices are abutted to each other to form a linear chain.
However, conventional EDA tools are confined to generate a linear, one-dimensional chain of abutted layout devices. However, for layout devices for photonic and radio frequency (RF) transmission lines, the orientation of the layout devices is important to maintain the integrity of the signals passing through these devices. For example, photonic waveguides have to be arranged in a complex two dimensional pattern for light to have correct geometrical propagation through the waveguides. Similarly, RF transmission lines have to be arranged in a two dimensional pattern to avoid unnecessary reflections of the waves passing through the transmission lines.
What is therefore required is an EDA systems and EDA implemented methods to generate two dimensional chains of abutted layout devices.